OpenCSD - CoreSight Trace Decode Library  0.9.0
trc_mem_acc_cache.h
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34 
35 #ifndef ARM_TRC_MEM_ACC_CACHE_H_INCLUDED
36 #define ARM_TRC_MEM_ACC_CACHE_H_INCLUDED
37 
38 #include <string>
39 #include "opencsd/ocsd_if_types.h"
40 
41 #define MEM_ACC_CACHE_PAGE_SIZE 256
42 #define MEM_ACC_CACHE_MRU_SIZE 12
43 
44 class TrcMemAccessorBase;
45 class ITraceErrorLog;
46 
47 typedef struct cache_block {
49  uint32_t valid_len;
52 
55 {
56 public:
59 
60  void enableCaching(bool bEnable) { m_bCacheEnabled = bEnable; };
61  void invalidateAll();
62  const bool enabled() const { return m_bCacheEnabled; };
63 
65  uint32_t readBytesFromCache(TrcMemAccessorBase *p_accessor, const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, const uint32_t reqBytes, uint8_t *byteBuffer);
66 
67  void setErrorLog(ITraceErrorLog *log);
68  void logAndClearCounts();
69 
70 private:
71  bool blockInCache(const ocsd_vaddr_t address, const uint32_t reqBytes); // run through each page to look for data.
72  bool blockInPage(const ocsd_vaddr_t address, const uint32_t reqBytes);
73  void logMsg(const std::string &szMsg);
74 
76  int m_mru_idx = 0; // in use index
77  int m_mru_next_new = 0; // next new page at this index.
78  bool m_bCacheEnabled = false;
79 
80  uint32_t m_hits = 0;
81  uint32_t m_misses = 0;
82  uint32_t m_pages = 0;
83  uint32_t m_hit_rl[MEM_ACC_CACHE_MRU_SIZE];
84  uint32_t m_hit_rl_max[MEM_ACC_CACHE_MRU_SIZE];
85 
86  ITraceErrorLog *m_err_log = 0;
87 };
88 
90 {
91  for (int i = 0; i < MEM_ACC_CACHE_MRU_SIZE; i++)
92  {
93  m_mru[i].st_addr = 0;
94  m_mru[i].valid_len = 0;
95  m_hit_rl[i] = 0;
96  m_hit_rl_max[i] = 0;
97  }
98 }
99 
100 inline bool TrcMemAccCache::blockInPage(const ocsd_vaddr_t address, const uint32_t reqBytes)
101 {
102  if ((m_mru[m_mru_idx].st_addr <= address) &&
103  m_mru[m_mru_idx].st_addr + m_mru[m_mru_idx].valid_len >= (address + reqBytes))
104  return true;
105  return false;
106 }
107 
108 inline bool TrcMemAccCache::blockInCache(const ocsd_vaddr_t address, const uint32_t reqBytes)
109 {
110  int tests = MEM_ACC_CACHE_MRU_SIZE;
111  while (tests)
112  {
113  if (blockInPage(address, reqBytes))
114  return true; // found address in page
115  tests--;
116  m_mru_idx++;
117  if (m_mru_idx == MEM_ACC_CACHE_MRU_SIZE)
118  m_mru_idx = 0;
119  }
120  return false;
121 }
122 
124 {
125  for (int i = 0; i < MEM_ACC_CACHE_MRU_SIZE; i++)
126  {
127  m_mru[i].valid_len = 0;
128  m_mru[i].st_addr = 0;
129  }
130  m_mru_idx = 0;
131  m_mru_next_new = 0;
132 }
133 
134 #endif // ARM_TRC_MEM_ACC_CACHE_H_INCLUDED
135 
136 /* End of File trc_mem_acc_cache.h */
ocsd_vaddr_t st_addr
uint32_t valid_len
uint64_t ocsd_vaddr_t
#define MEM_ACC_CACHE_MRU_SIZE
const bool enabled() const
struct cache_block cache_block_t
enum _ocsd_mem_space_acc_t ocsd_mem_space_acc_t
Error logging interface.This class provides a standard interface to the decoder error logger for all ...
Memory range to access by trace decoder.
void enableCaching(bool bEnable)
#define MEM_ACC_CACHE_PAGE_SIZE
OpenCSD : Standard Types used in the library interfaces.
uint8_t data[MEM_ACC_CACHE_PAGE_SIZE]